Stochastic Analysis Tasks

Formal Definition

Stochastic analysis tasks provide a means of managing queues.

Simplified Syntax

$q_initialize(identifier, type, length, status) ;
$q_add(identifier, job, information, status) ;
$q_remove(identifiers, job, information, status) ;
$q_full(identifier, status) ;
$q_exam(identifier, statistic_code, statistic_value, status) ;

Description

All statistic analysis tasks include identifier, and status arguments. The identifier is a unique integer value identifying the queue. The status argument is an output integer parameter giving information about the correctness of the specified task execution.

Status	Message
0	The queue generation was successful.
1	The queue cannot be increased; queue is full.
2	The identifier is undefined; please define an identifier.
3	Cannot remove a value; queue is empty.
4	The queue cannot be generated; this type is unsupported.
5	The length parameter is <= 0; the queue cannot be generated.
6	The identifier is duplicated; please define new identifier.
7	The queue cannot be generated; insufficient memory.

$q_initialize creates a queue. Parameter type determines the type of a queue. In case of 1, the created queue is FIFO and in case of 2 the queue is LIFO. Parameter length is an integer value specifying the maximum number of entries.

$q_add adds a new entry to the queue. Parameter job identifies the job. The special user-defined parameter, information, can maintain any information useful for the user.

$q_remove receives data from the queue. Parameters of this task are the same as those of the $q_add task.

$q_full checks to see of the queue identified by the identifier parameter is full.

$q_exam returns statistical information about the queue. Parameter statistic_code determines what you need to check and returns the result in statistic_value. The following table lists all possible values of statistic_code:

Statistic_code	Statistic_value
1	Length of queue.
2	Mean interarrival time.
3	Maximum length of queue.
4	Shortest wait time.
5	Longest wait time for jobs still in the queue.
6	Average wait time in the queue.

Examples

Example 1

always @(posedge clk)
begin
// check if queue1 is full
$q_full(queue1, status);
// if full then show message and remove one item
if (status) begin
  $display("Queue is full”);
  $q_remove(queue1, 1, info, status);
end
// add a new item to queue1
$q_add(queue1, 1, info, status);
// show message if there was an error
if (status)
  $display("Error %d”,status);
end
end

This example shows how to add a new element to the queues.

Important Notes

• The status parameter value should be checked after all operations on the queue.

Specify Block

Formal Definition

Allows a specific delay across a module.

Simplified Syntax

specify

  specparam declaration ;

  path declaration ;

  system timing check ;

endspecify

Description

The Specify block was designed to define a delay across a module. It starts with specify and ends with the endspecify keyword. Inside the block the user can specify: specparamdeclaration, path declaration or system timing check.

The syntax of specparam declaration is the same as that of the parameter declaration. After the specparam keyword the user can specify any number of parameters but only constant expressions are allowed on the right-hand sides of parameter assignments. A comma can separate the assignments, and the last statement ends with a semicolon. A previously declared specparameter can be used to declare the new specparameters. Unlike parameters, specparams cannot be overwritten, nor can they be used outside of a specify block.

Examples

Example 1

module ...
...
specify
  (In => Out) = (10);
endspecify
...
endmodule

A specify block with only a path declaration. Delay between input In and output Out is 10 time units.

Example 2

module ...
...
specify
  specparam TRise = 10,
  TFall = 15;
  (In => Out) = (TRise, TFall) ;
endspecify
...
endmodule

Specparam declaration with two parameters TRise and TFall to specify delays on rising transition and falling transition.

Example 3

module ...
...
specify
  specparam TRise = 10,
  TFall = 15;
  (In => Out) = (TRise, TFall) ;
  $setup(Data_in, posedge Clock, TRise) ;
endspecify
...
endmodule

The full specify block with specparam declaration, path declaration and system timing check task.

Important Notes

· Specify blocks have to be inside the module declaration location.

· Specparams are not visible outside of the Specify blocks.

· The defparam keyword cannot be used to override a specparam value.

State Dependent Path

Formal Definition

State Dependent Path is a path that occurs only when the condition is met.

Simplified Syntax

if (condition) simple_module_path;

if (condition) edge_sensitive_path;

ifnone simple_module_path;

Description

Generally, state dependent path is comprised of three parts. A condition that enables the module path, a module path description and a delay that applies to the module path.

The condition is an expression using scalars or vectors of any type. It can also be part-selects or bit-selects of a vector. Constant numbers and specparams can be used in the condition expression. The result of the conditional expression can be one bit or multiple bits. If it is more than one bit, the least significant bit represents the result.

When no edge transition is specified for the inputs, it is called the simple state-dependent path. Example 1 shows the simple-dependent path.

If any edge transition is specified for the input, then it is called an edge-sensitive state-dependent path. Different delays can be used to the same path if the following rules are followed:

a. A declaration must be unique and should use an edge or a conditional expression or both.

b. The port for which the delay is specified must be referenced in exactly the same way. You cannot mix part select, bit-select and complete ports.

Examples

Example 1

module example1 (cond, in_1, in_2, out);
input in_1, in_2, cond ;
output out ;
and (out, in_1, in_2) ;
specify
  specparam TRise1 = 5,
  TFall1 = 5,
  TRise2 = 7,
  TFall2 = 7;
  if (cond) ( in_1, in_2 *> out ) = (TRise1, TFall1);
  if (~cond) ( in_1, in_2 *> out ) = (TRise2, TFall2);
endspecify
endmodule

If a conditional expression 'cond' is true, TRise1 and TFall1 will be assigned to a path as delays. When the conditional expression 'cond' is false, TRise2 and TFall2 will be used as the path delays.

Important Notes

· When a conditional expression evaluates to x or z, it should be treated as true.

Simulation Time Functions

Formal Definition

The simulation time function provides an access to current simulation time.

Simplified Syntax

$time ;

$stime ;

$realtime ;

Description

When the $time system function is called, it returns the current time as a 64-bit integer value. However, this value is scaled to the `timescale unit. (See Timescale chapter)

The $stime system function returns current time as a 32-bit unsigned integer value. If the current simulation time is too large and the value does not fit in 32 bits, the function only returns the 32 low order bits of the value. The returned value is also scaled to the `timescale.

The $realtime system function returns a value as a real number. As with the other time tasks, the returned value is scaled to the `timescale.

Examples

Example 1

integer cur_time ;
cur_time = $time ;

Example 2

integer cur_time ;
cur_time = $stime ;

Example 3

real cur_time ;
cur_time = $realtime ;

Example 4

$display($time, "is current time.");

Important Notes

· $time, $stime, $realtime are functions which return specific values. If you are using these functions you have to declare registers that can support the returned value.

Simulation Control Tasks

Formal Definition

Simulation control tasks allow you to stop or quit simulation.

Simplified Syntax

$stop [(n)] ;

$finish [(n)] ;

Description

The $stop system task is used to suspend simulation. When invoked it suspends simulation, prints simulation time and prints location. Optional expressions can determine the type of printed message:

Expression (n)	Message
0	No message
1	Simulation time and location
2	Simulation time, location, memory consumption and CPU time used in simulation

By default the value 1 is used.

The $finish system task ends the simulation, exits the simulator and passes control back to the operating system. It can be invoked with the same arguments as the $stop system task and has the same default value.

Examples

Example 1

$stop ;

Suspend simulation and print message (default argument = 1)

Example 2

#150 $finish(2) ;

Exits simulator after 150 time units from the last executed statement and prints message (argument == 2).

Important Notes

• Remember that $finish control system task makes the simulator exit, however $stop simply suspends simulation.

Real Constants

Formal Definition

The real constants are used to specify floating-point numbers.

Simplified Syntax

sign unsigned_number.unsigned_number

sign unsigned_number.unsigned_number e sign unsigned_number

sign unsigned_number.unsigned_number E sign unsigned_number

Description

A real constant can be specified using only digits, underscores, decimal points and exponential symbols (e or E). It cannot be specified with size or base format. If a decimal point is provided then the real number should have at least one digit on both sides of a decimal point. Real numbers can be specified in the decimal notation (Example 1) or in the scientific notation (Example 2).

Examples

Example 1

17.5
0.5
1_000_000.0

Example 2

10e5
0.5694_e-5

Important Notes

· The real constants cannot be specified with size or base format.

Register Data Types

Formal Definition

Registers provide means for modeling data storage elements.

Simplified Syntax:

reg range list_of_identifiers;

integer list_of_identifiers;

real list_of_identifiers;

time list_of_identifiers;

realtime list_of_identifiers;

Description

Registers are data types that store assigned values until a new assignment occurs. A new value can be assigned to registers only by using procedural assignments.

The reg register is a 1-bit wide data type. If more than one bit is required then range declaration should be used (see Vectors for more explanations). Negative values assigned to reg data type variables are treated as unsigned values (see Arithmetic expressions with integers and registers for more explanations). Reg data type variables can be declared as memory.

The integer register is a 32-bit wide data type. Integer declarations cannot contain range specification. Integer variables can be declared as memory. Integers store signed values.

The time register is a 64-bit wide data type that is used to store simulation time and to check timing dependence. Time type registers store values as unsigned numbers. Time declaration cannot contain range specification. Time data type variables can be declared as memories.

The real register is a 64-bit wide data type that stores floating-point values. Real registers cannot be used with event control, concatenations ({}), modulus operator (%), case equality (===, !==), bit-wise operators (~, &, |, ^, ^~, ~^), reduction operators (^, ~^, ^~, &, &~, |, |~) and shift operators (<<, >>). Bit-selects and part-selects on real type variables are not allowed.

The realtime registers are treated in the same way as real registers.

Examples

reg scal;
reg [7:0] vect;
reg [7:0] mem [31:0];
integer i;
integer i_mem [7:0];
time t;
time t_mem [3:0];
real r;
realtime rt1, rt2;

'scal' is a 1-bit wide reg type register.

'vect' is an 8-bit wide reg type register.

'mem' is a reg type memory of 32 8-bit words.

'i' is an integer type register.

'i_mem' is an integer type memory.

't' is a time type register.

't_mem' is a time type memory.

'r' is a real type register.

'rt1' and 'rt2' are realtime type registers.

Important Notes

· New values can be assigned to registers only by using procedural statements.

· Some operators, bit-selects, part-selects, range and memory declaration arecannot be used with real and realtime type registers.

· Range can be specified only for reg data type registers.

· Real and realtime registers are initialized to zero value. Reg, integer and time registers are initialized to unknown value (x).