Design 1:
Design 2:
Subscribe to:
Post Comments (Atom)
-
What is latch up in CMOS design and ways to prevent it? A Problem which is inherent in the p-well and n-well processes is due to relativel...
-
Very often we come across questions from VLSI engineers that "Which scripting language should a VLSI engineer should learn?". Well... -
In Verilog certain type of assignments or expression are scheduled for execution at the same time and order of their execution is not guara...
-
This post will help you to understand the difference between real, realtime and shortreal data types of SystemVerilog and its usage. ...
-
CRC Example Error detection is an important part of communication systems when there is a chance of data getting corrupted. Whether it’s ...
thanks a lot:)
ReplyDelete