Difference between simulation and emulation

A simulation is a system that behaves similar to something else, but is implemented in an entirely different way. It provides the basic behaviour of a system but may not necessarily abide by all of the rules of the system being simulated. It is there to give you an idea about how something works.

Think of a flight simulator as an example. It looks and feels like you are flying an airplane, but you are completely disconnected from the reality of flying the plane, and you can bend or break those rules as you see fit. E.g.; Fly an Airbus A380 upside down between London and Sydney without breaking it.

An emulation is a system that behaves exactly like something else, and abides by all of the rules of the system being emulated. It’s like duplicating every aspect of the original device’s behaviour. It is effectively a complete replication of another system, right down to being binary compatible with the emulated system's inputs and outputs, but operating in a different environment to the environment of the original emulated system. The rules are fixed, and cannot be changed or the system fails.

Today hardware emulation has become an very popular tool for verification because of following reasons:

In the past few years, the emulation user community has expanded exponentially by the addition of software developers to the traditional base of hardware designers and verification engineers. 

Also, uses of hardware emulation have multiplied because of its versatility as a resource for debugging both the hardware and software of complex system-on-chip (SoC) designs. Hardware emulation is the only verification tool that can be deployed in more than one mode. In fact, it can be used in four main modes, some of which can be combined for added versatility. Because of this resourcefulness, hardware emulation can be used to achieve several verification objectives.

Following are the deployment modes for hardware emulator. These are characterized by type of stimulus applied to DUT:

• In Circuit Emulation (ICE) : This was considered to be the traditional method when hardware emulation was deployed. In this case, the DUT is mapped inside the emulator and connected in in-circuit emulation (ICE) mode to the target system in place of a chip or processor for debug prior to silicon availability.
  
• Transaction Based Acceleration (TBX) : Transaction-based emulation moves verification up a level of abstraction from the register transfer level (RTL), improving performance and debug productivity. It’s gaining popularity over the ICE mode because the physical target system is replaced by a virtual target system using a hardware verification language (HVL) such as
  SystemVerilog, SystemC, or C++.
  
• Simulation Testbench Acceleration : In this mode, an RTL testbench drives the DUT in the emulator via a programmable logic interface (PLI). In general, this is the slowest performance mode, but it has some advantages, such as the fact that it does not require changes to the testbench.
  
• Embeded Software Acceleration : In this mode, the software code is executed on the DUT processor mapped inside the emulator. This is the fastest performance mode, making it the choice for processing billions of verification cycles necessary to boot an operating system.

It is possible to mix some of the above modes, such as processing embedded software together with a virtual testbench driving the DUT via verification IP or even in ICE mode.

EDA Playground–An Awesome Online Tool

Many times we use the web to find code examples and tutorials. However, often the examples were incomplete. Sometimes they were missing the necessary code to hook the example into a real design. Other times, the code examples had syntax errors.

Sometime we are presented with a working design, with lines stripped out, but with undefined variables and dangling commas left in. Other times the code examples simply did not work on my simulator. All this resulted in endless frustration to us. I knew there had to be a better way, EDA Playground is one.

EDA Playground is a free web application that allows users to edit, simulate (and view waveforms), synthesize, and share their HDL code. Its goal is to accelerate the learning of design and testbench development with easier code sharing and with simpler access to simulators and libraries. EDA Playground is specifically designed for small prototypes and examples (it is not intended to be used for a full-blown FPGA or ASIC design).

EDA Playground gives engineers immediate hands-on exposure to simulating SystemVerilog, Verilog, VHDL, C++/SystemC, and other HDLs. All you need is a web browser. The goal is to accelerate learning of design/testbench development with easier code sharing, and with simpler access to EDA tools and libraries. EDA Playground is specifically designed for small prototypes and examples.

• With a simple click, run your code and see console output in real time. Pick another simulator version and run it again.
• View waves for your simulation using EPWave browser-based wave viewer.
• Save your code snippets. Share your code and simulation results with a web link. Perfect for web forum discussions or emails. Great for asking questions or sharing your knowledge.
• Quickly try something out
  • Try out a SystemVerilog feature before using it on your project.
  • Try out a library that you’re thinking of using.
  • Modify another engineer’s shared code and re-run it.
• Eliminate environment differences. Since the code always executes in the same environment, everyone will see the same result on a subsequent re-run.
• Browse and use a large repository of working code examples and templates.

 

ModelSim VS QuestaSim

We as an ASIC Engineer are frequently using different simulators for our simulation activity. At present time we are frequently using modelsim/Questa and vcs. These are the industry popular and well proven simulators.
We have seen people who are using modelsim / Questa simulator from Mentors but dont really know the exact difference between them.
We have captured some difference between Questa and Modelsim. Though both are simulators from the Mentor Graphics there are some differences between them. Below are the differences We captured :

ModelSim is Mentor Graphics HDL simulator. Questa is Mentor Graphics advanced verification platform that uses ModelSim as its core simulation engine.

Features of the two tools can be grouped into five categories and compared as follows:

1. Language Support
- ModelSim supports SystemVerilog IEEE 1800 for Design only, as well as VHDL (1987, 1993, 2002), Verilog (1995, 2001, 2005), as well as options for mixed language and language neutral licensing and support for SystemC 2.2 IEEE 1666/OSCI 2.2.
- Questa supports all of this as well as SystemVerilog IEEE 1800 for Verification, mixed language licensing (Questa is by default language neutral), PSL IEEE 1850, and SystemC 2.2 IEEE 1666/OSCI 2.2 as standard features.

2. Simulation
- ModelSim supports a single-kernel simulation engine, Verilog RTL & gate level performance optimizations, VHDL RTL & VITAL performance optimizations, performance and memory profiler, separate elaboration, waveform management tool set, VCD and extended VCD support, VCD re-simulation, batch mode simulation, integrated simulation, checkpoint & restore,
- Questa’s simulation support is identical to ModelSim’s

3. Design Entry, Debug, and Analysis
- ModelSim supports an HDL editor, integrated project manager, source code templates and wizards, interactive and post-simulation debug, dataflow graphical and textual causality traceback, source annotation, memory window, extra standalone viewer, multiple waveform windows, waveform compare, C Debugger and transaction viewing for SystemC.
- Questa supports all of this and the C debugger and transaction viewing for SystemC and SystemVerilog are standard parts of the product.

4. Advanced Verification Methods
- ModelSim does not support any advanced verification features.
- Questa supports assertion-based verification (including a library of pre-written assertions called Questa Verification Library or QVL, and an assertion thread debugger), automated test stimulus generation via a constraint solver engine, and PowerAware RTL verification supporting both CPF and UPF formats.

5 Verification Management and Coverage
- ModelSim supports Code Coverage (it is included in ModelSim SE, and an option to other versions of ModelSim).
-Questa supports code coverage along with functional coverage, a unified coverage database (UCDB), coverage viewing, test ranking, and test plan tracking

Hope you find this information useful.

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Modelsim Student Edition

Mentor Graphics was the first to combine single kernel simulator (SKS) technology with a unified debug environment for Verilog, VHDL, and SystemC. The combination of industry-leading, native SKS performance with the best integrated debug and analysis environment make ModelSim the simulator of choice for both ASIC and FPGA design. The best standards and platform support in the industry make it easy to adopt in the majority of process and tool flows.

About ModelSim PE Student Edition

Highlights

• Support for both VHDL and Verilog designs (non-mixed).
• Intelligent, easy-to-use graphical user interface with TCL interface.
• Project manager and source code templates and wizards.

Now please be advised that the download url for ModelSim PE Student Edition (10.2c) has been permanently moved to the Mentor Graphics Higher Education website:

http://www.mentor.com/company/higher_ed/modelsim-student-edition

The current ModelSim PE Student Edition release is 10.2c. New releases will be posted to this web page.

Please note that the license request process remains the same.

1. With admin user rights to the Windows based PC, download and execute the installer.

2. Follow the dialog prompts and agree to the End User License Agreement

3. The last step of the installation will open a web browser window to the Student Edition license request page.

4. Information from YOUR computer will assist in creating the license file.

5. Fill out the license request form and be sure that you enter a valid email address.

6. You will immediately be sent an email with the license file and instructions.

7. Check your spam folder if you do not receive the license file within a few minutes.

8. If you never receive the email containing the license file, you MUST rerun the installer to reach the license request page again.

THIS IS THE ONLY WAY TO RECEIVE A LICENSE FILE!

Please remember that the license file is tied to the computer that you installed ModelSim PE Student Edition upon. You may request the license be delivered to a different email address if you did not receive the license file the first time around.

In addition, if your University uses ModelSim PE Student Edition in your Classroom - please have your course administrator contact the Higher Education Department for FULL ModelSim LICENSES through the Higher Education Program for a modest support fee.
http://www.mentor.com/company/higher_ed/

Lastly - there is NO End-User Product Support for ModelSim PE Student Edition.