JEDEC's DDR4 DRAM standard is compatible with 3DIC architectures and is capable of data transfer rates up to 3.2 gigatransfers per second, Kristin Lewotsky notes in this article. "We've got a broad population of folks who really haven't had the time or the business need to learn about DDR4," says Perry Keller of Agilent Technologies. "What we hope to do is familiarize them with DDR4: What it is, why it exists, what it can bring to their products, and how to do something practical with it." EE Times
Featured post
Top 5 books to refer for a VHDL beginner
VHDL (VHSIC-HDL, Very High-Speed Integrated Circuit Hardware Description Language) is a hardware description language used in electronic des...
Thursday, 14 February 2013
How and why DDR4 timing is important
Subscribe to:
Post Comments (Atom)
-
Very often we come across questions from VLSI engineers that "Which scripting language should a VLSI engineer should learn?". Well...
-
Examining the four-bit binary count sequence, another predictive pattern can be seen. Notice that just before a bit toggles, all preceding b...
-
Up/down counter circuits are very useful devices. A common application is in machine motion control, where devices called rotary shaft encod...
-
We can build a counter circuit with selectable between "up" and "down" count modes by having dual lines of AND gates det...
-
In a digital circuit, counters are used to do 3 main functions: timing, sequencing and counting. A timing problem might require that a high...
No comments:
Post a Comment
Please provide valuable comments and suggestions for our motivation. Feel free to write down any query if you have regarding this post.